1. Field of the Invention
This invention relates generally to charge-coupled devices and more particularly to a bipolar dual-channel charge-coupled device for the simultaneous storage of two independent bit streams of charge packets of opposite conductivity types.
2. Description of the Prior Art
Charge-coupled device (CCD) structures for use in data processing system storage and communication signal processing are well known in the art. Referring to the patents and publications listed below under the heading "References Cited By Applicant", Boyle and Smith [Refs. 1, 2, 3] originally disclosed the basic charge-coupled concept in the form of a surface channel device. Krambeck [Ref. 4] then disclosed the buried channel structure wherein the charge packets are within the bulk of the semiconductor rather than at the surface. Modifications of the buried channel arrangement were thereafter disclosed by Carnes and Kosonocky [Ref. 5], Erb [Ref. 6], Tasch [Ref. 7], Esser [Ref. 8] and Walden [Ref. 9].
The charge-coupled structure is a serial device and therefore its access time is much slower than a randomly accessed semiconductor device. However, the charge-coupled device has a higher bit density and simpler structure and therefore lower cost than the random access memory device, and therefore may have utility in mass storage applications where cost rather than speed is of primary importance. However, in these low-cost applications the charge-coupled device must compete on a cost basis with presently available techologies such as disk and tape storage, as well as proposed new technologies such as the bubble magnetic memory.
Therefore, if the charge-coupled device is to succeed in this competition of technolgies, it is vitally important that the cost per bit of information be reduced by every feasible means. Since for a given chip size and technology the cost of manufacture is approximately constant, one of the most effective ways of reducing the cost is to increase the chip density; that is, the number of bits of information stored per chip unit area.
Krambeck [Ref. 4] discloses an arrangement having dual buried channels parallel to and spaced from each other and buried within the semiconductor bulk so as to store two independent bit streams. If feasible, this arrangement would approximately double the bit density. In effect, this proposal appears to be an attempt to fabricate CCD registers on the front as well as the back side of the wafer, and thus obtain two registers in the same area. However, it is believed that the inherent disadvantages of this arrangement render it impractical so that it has not been put into production.
The prior art noted above, as well as all other prior integrated circuit devices of which the present inventor is aware, are divided by a rigid dichotomy of bipolar and MOS technologies. That is, the bipolar devices involve the flow of charge carriers of both conductivity types, whereas the MOS (metal-oxide-semiconductor) devices are unipolar and involve the flow of charge carriers of only one conductivity type. More particularly, all charge-coupled devices of the prior art of which the present inventor is aware embody the unipolar MOS technology.